Octal Transceiver/Register with 3-STATE Outputs

These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level. Control G and direction pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the enable control G is Active LOW. In the isolation mode (control G HIGH), A data may be stored in the B register and/or B data may be stored in the A register.

Features

• Independent registers for A and B buses
• Multiplexed real-time and stored data
• 74F646 has non-inverting data paths
• 3-STATE outputs

• Quelle
• Datenblatt
  • Datasheet 74F646 National 195kB
  • Datasheet 74F646 Fairschild 72kB
  • Datasheet 74F646 Philips 117kB
  • Datasheet 74FCT646 IDT 273kB
  • Datasheet 74LS646 Texas Instruments 429kB

• interne Links: Einkaufshinweise und Logic-Gatter